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“Simulation of Analog Solution of Boolean Satisfiability”

R. Joseph Connor and Jeremy Holleman and Bruce J. MacLennan and Jared M. Smith

Published  2015-09-29 00:00:00  as  ut-eecs-15-735 (eID:593)

We present an analog implementation of a dynamical system for solving Boolean satisfiability, an NP-complete problem. Simulations of modest-sized hardware implementations in the presence of noise and integrator offset demonstrate that the algorithm is suitable for implementation in analog electronics.

Attachments

ut-eecs-15-735.pdf

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